版本 b5be09efc14d8cbc6c380b16633c00dcd8ef020b

embedded/SPI

Changes from b5be09efc14d8cbc6c380b16633c00dcd8ef020b to 8562be1263cbdc022b893d03f3d56875dbf99299

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title: SPI
...

Outline
=======
SPI 匯流排是由Motorla所命名的匯流排名稱。它是一個可同步序列資料連結的標準也可以在全雙功的模式下運作。
在資料傳輸的過程當中是以Master/Slave的角色來傳遞資料，必須要由Master來主動提取資料，而Slave只能被
動地接收命令或傳送資料。而傳送資料的同時，Master也可以傳送命令給Slave無須等對方完全收到資料才進行下一步。

.. image:: /SPI_single_slave.svg
Interface
=========
SPI 匯流排有規範4個腳位

    SCLK: serial clock (output from master);

    MOSI: master output, slave input (output from master);

    MISO: master input, slave output (output from slave);

    SS: slave select (active low, output from master).

STM32F4XX 
=========
It has up to 3 SPIs (37.5 Mbits/s), 2 with muxed full-duplex I2S to achieve audio class 
accuracy via internal audio PLL or external clock

SPI1 can communicate at up to 37.5 Mbits/s, SPI2 and SPI3 can communicate at up to 21 Mbit/s.

Operation
=========
Data transmission
-----------------
Clock polarity and phase
~~~~~~~~~~~~~~~~~~~~~~~~
Mode numbers
~~~~~~~~~~~~~
..
    may know used structure
    guess: interrupt
Independent slave SPI configuration
-----------------------------------
Daisy chain SPI configuration
------------------------------
Valid SPI communication
-----------------------
interrupts
----------
Example of bit-banging the SPI master protocol
===============================================

Reference
=========
`Serial Peripheral Interface Bus - Wikipedia, the free encyclopedia`_

.. _`Serial Peripheral Interface Bus - Wikipedia, the free encyclopedia`: http://en.wikipedia.org/wiki/Serial_Peripheral_Interface_Bus