版本 066c7dd59be96b1c109486d5f61b454b88af25cf

embedded/SPI

Changes from 066c7dd59be96b1c109486d5f61b454b88af25cf to 04fbe6f878ee4fba475b5847a1a5580518e96bdf

---
title: SPI
...


Overview
========

..
    關聯在哪？舉例。
    圖例

SPI 為資料傳輸協定，有著以下幾點特色：

- 同步式 
- 全雙工
    - 可以半雙工或單工
- 主從式
    - dynamic change of master/ slave
    - 多個 master
- 8 master baud rate prescalers
- slave mode frequency
- SPI TI / motorola mode 
- MSB-first or LSB-first
- Hardware CRC
- DMA capability
.. BIDI mode / RXONLY (p. 801)
..
    I2S feature

Device overview
===============

|STM32F40x block diagram|
.. image:: /embedded/SPI/STM32F40x block diagram.png
STM32F40x block diagram [#]_

.. |STM32F40x block diagram| image:: /embedded/SPI/STM32F40x block diagram.png
.. [#] `STM32F405xx, STM32F407xx , STM32F415xx and ... <http://www.st.com/internet/com/TECHNICAL_RESOURCES/TECHNICAL_LITERATURE/REFERENCE_MANUAL/DM00031020.pdf>`_ p.


SPI functional description
==========================

|SPI block diagram|
.. 介紹 pin

.. |SPI block diagram| image:: /embedded/SPI/SPI block diagram.png
.. image:: /embedded/SPI/SPI block diagram.png
SPI block diagram [#]_

MISO: Master In / Slave Out data
MISO: Master Out / Slave In data
SCK: Serial Clock ( Master -> Slave )
NSS: *optional* select slave, low-driven
.. [#] `STM32F405xx, STM32F407xx , STM32F415xx and ... <http://www.st.com/internet/com/TECHNICAL_RESOURCES/TECHNICAL_LITERATURE/REFERENCE_MANUAL/DM00031020.pdf>`_ p.793

- MISO: Master In / Slave Out data
- MISO: Master Out / Slave In data
- SCK: Serial Clock ( Master -> Slave )
- NSS: *(optional)* select slave, low-driven

Clock phase and clock polarity
------------------------------


..
    Register
    ========
    MSTR: Master selection
    SSOE: SS output enable
    SSM: software SS management

.. image:: /SPI_single_slave.svg
Interface
=========
SPI 匯流排有規範4個腳位
|SPI single master/single slave application|

    SCLK: serial clock (output from master);
.. |SPI single master/single slave application| image:: /embedded/SPI/SPI 1-1 application.png

    MOSI: master output, slave input (output from master);

    MISO: master input, slave output (output from slave);

    SS: slave select (active low, output from master).


STM32F4XX 
=========
It has up to 3 SPIs (37.5 Mbits/s), 2 with muxed full-duplex I2S to achieve audio class 
accuracy via internal audio PLL or external clock

SPI1 can communicate at up to 37.5 Mbits/s, SPI2 and SPI3 can communicate at up to 21 Mbit/s.

Operation
=========
Data transmission
-----------------
Clock polarity and phase
~~~~~~~~~~~~~~~~~~~~~~~~
Mode numbers
~~~~~~~~~~~~~
..
    may know used structure
    guess: interrupt
Independent slave SPI configuration
-----------------------------------
Daisy chain SPI configuration
------------------------------
Valid SPI communication
-----------------------
interrupts
----------
Example of bit-banging the SPI master protocol
===============================================


Reference
=========
- `Serial Peripheral Interface Bus - Wikipedia, the free encyclopedia <http://en.wikipedia.org/wiki/Serial_Peripheral_Interface_Bus>`_
- Reference manual: `STM32F405xx, STM32F407xx , STM32F415xx and ... <http://www.st.com/internet/com/TECHNICAL_RESOURCES/TECHNICAL_LITERATURE/REFERENCE_MANUAL/DM00031020.pdf>`_
- Datasheet: `DS8626: ARM Cortex-M4 32b MCU+FPU, 210DMIPS, up to 1MB Flash/192+4KB RAM, USB OTG HS/FS, Ethernet, 17 TIMs, 3 ADCs, 15 comm. interfaces & camera <http://www.st.com/internet/com/TECHNICAL_RESOURCES/TECHNICAL_LITERATURE/DATASHEET/DM00037051.pdf>`_

.. need improve

.. _`Reference manual`: http://www.st.com/internet/com/TECHNICAL_RESOURCES/TECHNICAL_LITERATURE/REFERENCE_MANUAL/DM00031020.pdf