版本 066c7dd59be96b1c109486d5f61b454b88af25cf
SPI
Overview
.. 關聯在哪?舉例。 圖例
SPI 為資料傳輸協定,有著以下幾點特色:
- 同步式
- 全雙工
- 可以半雙工或單工
- 主從式
- dynamic change of master/ slave
- 多個 master
- 8 master baud rate prescalers
- slave mode frequency
- SPI TI / motorola mode
- MSB-first or LSB-first
- Hardware CRC
- DMA capability .. BIDI mode / RXONLY (p. 801) .. I2S feature
Device overview
|STM32F40x block diagram|
.. |STM32F40x block diagram| image:: /embedded/SPI/STM32F40x block diagram.png
SPI functional description
|SPI block diagram|
.. |SPI block diagram| image:: /embedded/SPI/SPI block diagram.png
MISO: Master In / Slave Out data MISO: Master Out / Slave In data SCK: Serial Clock ( Master -> Slave ) NSS: optional select slave, low-driven
.. image:: /SPI_single_slave.svg Interface ========= SPI 匯流排有規範4個腳位
SCLK: serial clock (output from master);
MOSI: master output, slave input (output from master);
MISO: master input, slave output (output from slave);
SS: slave select (active low, output from master).
STM32F4XX
It has up to 3 SPIs (37.5 Mbits/s), 2 with muxed full-duplex I2S to achieve audio class accuracy via internal audio PLL or external clock
SPI1 can communicate at up to 37.5 Mbits/s, SPI2 and SPI3 can communicate at up to 21 Mbit/s.
Operation
Data transmission
Clock polarity and phase ~~~~~~~~~~~~~~~~~~~~~~~~ Mode numbers ~~~~~~~~~~~~~ .. may know used structure guess: interrupt Independent slave SPI configuration ———————————– Daisy chain SPI configuration —————————— Valid SPI communication ———————– interrupts ———- Example of bit-banging the SPI master protocol ===============================================
Reference
Serial Peripheral Interface Bus - Wikipedia, the free encyclopedia <http://en.wikipedia.org/wiki/Serial_Peripheral_Interface_Bus>
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