Introduction

What is SDIO?

• A SDIO (Secure Digital Input Output) card is an extension of the SD specification to cover I/O functions.
• Host devices that support SDIO can use the SD slot to support:
  1. GPS receivers.
  2. digital cameras.
  3. RFID readers.
  4. FM radio tuners.
  5. TV tuners.
  6. Wi-Fi.
  7. Bluetooth.

Many other SDIO devices have been proposed, but it is now more common for I/O devices to connect using the USB interface. - SDIO cards support most of the memory commands of SD cards. SDIO cards can be structured as 8 logical cards, although currently, the typical way that an SDIO card uses this capability is to structure itself as one I/O card and one memory card.

.. image:: /sdio1.png .. image:: /sdio2.png

Difference of SD/MMC/SDIO

Speed class rating

SDIO bus topology

.. image:: /Selection_015.png .. image:: /Selection_016.png Note: The SDIO will not send any data as long as the Busy signal is asserted (SDIO_D0 pulled low).

.. image:: /Selection_017.png .. image:: /Selection_018.png .. image:: /Selection_019.png

SDIO functional description

.. image:: /sdio_functional_description.png

圖說明：

• SDIO_D0預設是用來當作資料傳輸 , 而在初始化時 , host端可以設定其資料寬度。
• 當MMC連至bus時 , MMC可以支援只有1bit模式。
• 當SD/SD I/O連至bus時,data transfer可以由host端來設定是SDIO_D0(1bit mode) 或者是 SDIO_D3:0 而所有的data lines都是操作於push-pull mode.

SDIO_CMD has two operational modes:

• Open-drain for initialization (only for MMCV3.31 or previous)

• Push-pull for command transfer (SD/SD I/O card MMC4.2 use push-pull drivers also for initialization)

SDIO_CK is the clock to the card:

• 在clock cycle 中 , 1 bit是用來切換command 或是 data lines.
• clock的頻率依照規格不同有所不同：
  • between 0 and 20 MHz (for a MultiMediaCard V3.31).
  • between 0 and 48 MHz for a MultiMediaCard V4.0/4.2).
  • between 0 and 25 MHz (for an SD/SD I/O card).
• The SDIO uses two clock signals:
  • SDIO adapter clock(SDIOCLK = 48MHz is coming from a specific output of PLL (PLL48CLK) ).
  • APB2 bus clock(PCLK2). NOTE: PCLK2 與 SDIO_CLK 之clock頻率必須遵循以下條件： Frequency PCLK2 ≥ (3/8) * Frequency SDIO_CK ?????????????????

The signals shown in Table 149 are used on the MultiMediaCard/SD/SD I/O card bus

.. image:: /SDIO_IO_definitions.png

SDIO adapter

block diagram of an SDIO adapter.

.. image:: /sdio_adapter.png

上圖中包含了五個子單元：

• Adapter register block
• Control unit
• Command path
• Data path
• Data FIFO

由圖中可以看出 , adapter registers 和 FIFO都是採用APB2 bus clock domain (PCLK2), 而control unit , command path , data path 則是採用SDIO adapter clock domain(SDIOCLK).

Q&A : WHY??????????????????????????????????????????????????????

Adapter registers 主要包含了所有SDIO的暫存器 , 而這些暫存器是用來配置一些參數,以用來實現SD協定中的時序,最終目的是用來實現SD卡的命令傳輸。 而FIFO則是為了實現與data path的傳輸。

Reference

• Secure Digital wiki<http://en.wikipedia.org/wiki/Secure_Digital#SDIO>_
• SDIO接口介绍<http://en.wikipedia.org/wiki/Secure_Digital#SDIO>_
• Linux（open source）的 SD/MMC/SDIO 支援現況概要<http://www.jollen.org/blog/2007/01/open_source_sd_mmc_sdio.html>_
• SD/MMC/SDIO概念區分<http://bbs.ednchina.com/BLOG_ARTICLE_198217.HTM>_
• STM32 控制 SD 卡<http://www.360doc.com/content/12/0411/15/9707346_202767012.shtml>_
• STM32 + SDIO + FATFS 文件系统 直讀 SD 卡<http://ntn314.blog.163.com/blog/static/16174358420112263456948/>_
• 零死角玩轉 stm32 - 高級篇之 SDIO（4bit + DMA、支持SDHC、帶協議分析）<http://www.eeboard.com/tutorials/%E9%9B%B6%E6%AD%BB%E8%A7%92%E7%8E%A9%E8%BD%ACstm32-%E9%AB%98%E7%BA%A7%E7%AF%87%E4%B9%8Bsdio%EF%BC%884bit-dma%E3%80%81%E6%94%AF%E6%8C%81sdhc%E3%80%81%E5%B8%A6%E5%8D%8F%E8%AE%AE%E5%88%86%E6%9E%90/>_