版本 61e04dac735398e6f94f522e153f6652d7855040
General-purpose Input/Output (GPIO)
- Introduction
- Main Feature
- Functional Description
- Configuration
- Input configuration (P.193, 7.3.9 Input configuration in Reference manual)
- Output configuration (P.194, 7.3.10 Output configuration in Reference manual)
- Alternate function configuration (P.195, 7.3.11 Alternate function configuration in Reference manual)
- Analog configuration (P.196, 7.3.12 Analog configuration in Reference manual)
- Demo
- Reference
Introduction
General Purpose Input/Output (GPIO) is a generic pin on a chip whose behavior (including whether it is an input or output pin) can be controlled (programmed) by the user at run time.
通常我們program使用的data都是放在memory比較多,而GPIO也提供類似的操作方法給programmer(讓我們去更改記憶體內容就可以去控制pin,並影響周遭設備的運行),但真正的設備的位置並非真正落在記憶體上(如:LED、Button、…等),故GPIO的核心是記憶體操作與設備之間的一些電路特性。
Main Feature
GPIO雖然建立起記憶體與設備之間的橋梁,但也並非我們就可以隨意使用,我們必須要經過設定之後才能讓我們想要的設備正常工作。
一個pin一次只能被設定成是input或output,而input會有三種狀態表現(floating, pull-up/down, analog),而output只有兩種狀態表現(push-pull or open drain + pull-up/down)。
- input/output方向解說 : input是指記憶體方接收來自設備的訊號源,output是指記憶體傳送訊號給設備。
當pin被設定成input時,非analog的設定下,我們可以利用GPIO的input data register(GPIOx_IDR) 或是memory中提供給目標設備的data register (當設成alternate function的時候)去接收data。
當pin被設定成output時,非analog的設定下,GPIO本身有提供output data register (GPIOx_ODR)來對目標設備做控制,但要是pin不是使用原本預先定義好的功能時(非預先定義的功能都算是alternate function的類別),此時要用memory中,另外規劃給目標設備用的register。
如果pin被設成analog的話,無論input or output都會由adc那邊做處理。
Functional Description
input
- floating vs. pull-up/pull-down
當input pin被處在高阻抗的模式下,若沒有外部訊號源進來的話,此時是無法確定pin的狀態(不能確定現在處在高電位或低電位),除非有外部訊號來驅動電路。換句話說,input floating,這個input電位狀態完全是由外部訊號來決定,沒有訊號驅動的話,就會呈現高阻抗狀態。
剛剛提到floating在沒有外部訊號驅動的情況下是呈現高阻抗狀態(無法確定電位狀態=>不能明確表示現在值是0或1),如果我們需要這個pin有一個明確的預設狀態時,必須借助pull-up(pull-down)resistor來做調整,在pull-up resistor(pull-up外接高電壓,pull-down通常會接地)加入之下,讓pin的維持在明確的高電壓狀態(pull-down則是讓pin維持在低電壓狀態)。舉例來說,如果我們定電壓在3-4 V之間是1的狀態,0-1之間是0的狀態,高阻抗的時候,電壓是不明確的,有可能電壓值會落在1-3之間的不明確地帶,甚至是沒有在任何一個狀態維持一段時間,此時的狀態是未定的,但如果我們加入pull-up resistor的話,這個pin接受來自pull-up另一端的電壓供應,讓pin至少維持在3v以上時,我們就可以確定在沒有外部訊號驅動時,pin是維持在高電位狀態。
output
- push-pull vs. open-drain with pull-up/pull-down
analog
basic of structure (P.186, Figure 17. Basic structure of a five-volt tolerant I/O port bit in Reference manual)
.. image:: /embedded/GPIO_basic_src.PNG
Vdd : 一個供電來源,電壓介在1.7 V - 3.6V之間
Vdd_ft : 5-volt tolerant用的供電來源。
Configuration
Input configuration (P.193, 7.3.9 Input configuration in Reference manual)
When the I/O port is programmed as Input:
- the output buffer is disabled
- the Schmitt trigger input is activated
- the pull-up and pull-down resistors are activated depending on the value in the GPIOx_PUPDR register
- The data present on the I/O pin are sampled into the input data register every AHB1 clock cycle
- A read access to the input data register provides the I/O State
Output configuration (P.194, 7.3.10 Output configuration in Reference manual)
When the I/O port is programmed as output:
- The output buffer is enabled:
- Open drain mode: A “0” in the Output register activates the N-MOS whereas a “1” in the Output register leaves the port in Hi-Z (the P-MOS is never activated)
- Push-pull mode: A “0” in the Output register activates the N-MOS whereas a “1” in the Output register activates the P-MOS
- The Schmitt trigger input is activated
- The weak pull-up and pull-down resistors are activated or not depending on the value in the GPIOx_PUPDR register
- The data present on the I/O pin are sampled into the input data register every AHB1 clock cycle
- A read access to the input data register gets the I/O state
- A read access to the output data register gets the last written value
Alternate function configuration (P.195, 7.3.11 Alternate function configuration in Reference manual)
When the I/O port is programmed as alternate function:
- The output buffer can be configured as open-drain or push-pull
- The output buffer is driven by the signal coming from the peripheral (transmitter enable and data)
- The Schmitt trigger input is activated
- The weak pull-up and pull-down resistors are activated or not depending on the value in the GPIOx_PUPDR register
- The data present on the I/O pin are sampled into the input data register every AHB1 clock cycle
- A read access to the input data register gets the I/O state
Supplement:
GPIOx_AFRL[31:0] and GPIOx_ARHL[31:0] provide ways to select alternation functions. However, different alternate functions maps to different bits of ports. Table below is part of alternate function mapping, which is mainly about USART2/3.
For more information, please refer to Table 8. Alternate function mapping from P.58-62 in STM32F407xx Datasheet.
.. image:: /embedded/af_mapping.png
Analog configuration (P.196, 7.3.12 Analog configuration in Reference manual)
When the I/O port is programmed as analog configuration:
- The output buffer is disabled
- The Schmitt trigger input is deactivated, providing zero consumption for every analog value of the I/O pin. The output of the Schmitt trigger is forced to a constant value (0).
- The weak pull-up and pull-down resistors are disabled
- Read access to the input data register gets the value “0”
Note: In the analog configuration, the I/O pins cannot be 5 Volt tolerant.
Demo
Reference
General Purpose Input/Output - Wikipedia, the free encyclopedia <http://en.wikipedia.org/wiki/General_Purpose_Input/Output>
_STM32F407xx Datasheet<http://www.st.com/internet/com/TECHNICAL_RESOURCES/TECHNICAL_LITERATURE/DATASHEET/DM00037051.pdf>
_STM32F407xx Reference Manual<http://www.st.com/internet/com/TECHNICAL_RESOURCES/TECHNICAL_LITERATURE/REFERENCE_MANUAL/DM00031020.pdf>
_稀里糊塗學 STM32 第二講:源源不絕</embedded/learn-stm32-part-2.pdf>
_GPIO PPT</embedded/GPIO_v3.ppt>
_